The Designer's Guide to VHDL (Systems on Silicon) Review

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The Designer's Guide to VHDL (Systems on Silicon) ReviewUntil Peter's next book comes out of course! I would give it 5 stars if I was just learning the VHDL language, but I'm actually trying to use VHDL for FPGA design and this book falls short in that regard.
This book is really good at explaining the 'mechanics' of VHDL programming. It is an out growth of Peter's "Intro to VHDL" paper that was published on the web and it sort of shows. I really like the depth that it goes into, I wish it had the standard libraries in the appendix. (it doesn't) However, until getting Ashendon's book, all other VHDL texts were pretty opaque.
The only thing this book does not have is a treatment of logic 'inference.' Since all VHDL compilers today "infer" (a fancy way of saying "guess") what logic would be able to implement a behavior, not understanding how those compilers guess makes it possible to write syntactically clean VHDL that doesn't synthesize any logic. To get a better handle on inference I'd recommend "HDL Chip Design" by Smith.The Designer's Guide to VHDL (Systems on Silicon) Overview

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Designing with FPGAs and CPLDs Review

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Designing with FPGAs and CPLDs ReviewI bought this book to get started on FPGA design.
I found the book to be an mixture of high level concepts (how to test designs, design methodology) and low level (converting async. logic to sync.). With my little knowledge of Verilog this was fairly useful.
I can't help feeling that the book is aimed at engineering managers rather than engineers.
I liked the explanation of the internal structure of various PLDs. This gives a reasonable understanding of how these devices work, which is always a good thing. I also liked the design/test guidelines in Chapter 5. This gives a good overview of pitfalls and a basis for attacking a design, albeit quite briefly.
I didn't like the brevity and the 'overview' nature of much of the material. The book needs a big brother to actually get into the topics properly - I believe the Author has written a good book on Verilog so maybe that helps. I found the chapter on tools very dissappointing - it left me with a vague understanding of the various tools, but I would have liked a summary of available tools and information on costs and performance.
Taking out the questions and a few over-long code samples, the book has only around 150 pages of actual material, in fairly large print. It took 2-3 hours to read carefully.
Overall this book is a strange animal, but I found it fairly useful.Designing with FPGAs and CPLDs Overview* Choose the right programmable logic devices and development tools * Understand the design, verification, and testing issues * Plan schedules and allocate resources efficiently Choose the right programmable logic devices with this guide to the technologDesigning with FPGAs and CPLDs guides readers through choosing the right programmable logic devices, understanding the design, verification, and testing issues involved with them, and more.

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